The present invention relates to an integrated circuit having insulated-gate transistors (thin-film transistors, TFTs) that are formed on an insulating surface of an insulating material such as glass, a material in which an insulating coating of, for instance, silicon dioxide is formed on a silicon wafer, or a like material. In particular, the invention relates to a complementary integrated circuit having N-channel TFTs and P-channel TFTs.
Complementary circuits using TFTs are conventionally used to drive an active matrix type liquid crystal display device, an image sensor, and the like. However, in general, the absolute value of the threshold voltage of the TFT is larger than that of the MOS transistor using a single crystal semiconductor. Further, the absolute value of a threshold voltage of an N-channel TFT is largely different from that of a P-channel TFT. For example, the threshold voltage is 2 V in an N-channel TFT, and xe2x88x924 V in a P-channel TFT.
The large difference in the absolute value of a threshold voltage between an N-channel TFT and a P-channel TFT is not preferable in the operation of complementary circuits, and is particularly a large obstacle to reduce a drive voltage. For example, when a complementary inverter is constructed using such TFTs, P-channel TFTs generally having a larger absolute value in a threshold voltage cannot operate properly with a low drive voltage. That is, in substance, the P-channel TFTs function merely as passive elements like resistors, and cannot operate sufficiently fast. To have P-channel TFTs operate as active elements, the drive voltage needs to be sufficiently high.
In particular, when the gate electrode is formed of a material whose work function "PHgr"M is smaller than 5 eV, for instance, aluminum ("PHgr"M=4.1 eV), a difference "PHgr"MS in work function between the gate electrode and the intrinsic silicon semiconductor is as small as xe2x88x920.6 eV. As a result, the threshold voltage of a P-channel TFT likely shifts to the negative side and that of an N-channel TFT becomes close to 0 V. Therefore, an N-channel TFT is likely rendered in a normally-on state (a current flows between the source and drain even if the gate voltage is 0 V).
In the above circumstances, it has been desired to approximately equalize the absolute value of a threshold voltage of the N-channel TFT to that of the P-channel TFT. In the case of conventional mono-crystalline semiconductor integrated circuit technology, the threshold voltages have been controlled by using N or P type impurity doping at a very small concentration, typically, less than 1xc3x971018 atoms/cm3. That is, the threshold voltages can be controlled with an accuracy of 0.1 V or less by an impurity doping at 1xc3x971015 to 1xc3x971018 atoms/cm3.
However, in the case of using non-single crystalline semiconductors, especially, polycrystalline semiconductors, even if an impurity is added at 1xc3x971018 atoms/cm3 or less, the shift of the threshold voltage is hardly observed. Moreover, if the concentration of the impurity exceeds 1xc3x971018. the threshold voltage rapidly varies and the conductivity becomes p-type or n-type. This is because, polycrystalline silicon generally has a lot of defects in it. Since the defect density is about 1xc3x971018 atoms/cm3, the added impurities are trapped by these defects and cannot be activated. Further, if the concentration of the impurity becomes larger than the defect density, the excess impurity is activated and changes the conductivity type to p-type or n-type.
In view of the above circumstances, an object of the present invention is to provide a method for approximately equalizing the absolute value of a threshold voltage of the N-channel TFT to that of the P-channel TFT.
The channel length is the distance between the source and drain regions in the TFT. Also, when source and drain regions are determined in a self-alignment manner with respect to a gate electrode, the channel length is also determined by the width of the gate electrode.
Although there occurs some diffusion of the impurity during the doping process, since the length of the diffusion is almost uniform on the entire surface of a substrate, if the structure of TFTs formed on a substrate is the same, the channel length can be determined by the width of a gate electrode. For example, the channel length is obtained by subtracting the length of the diffusion from the width of the gate electrode.
According to the invention, the channel length of a P-channel TFT is made shorter than that of an N-channel TFT preferably by at least 20%, to make the absolute value of the threshold voltage of the P-channel TFT relatively small. As a result, the threshold voltage absolute values of the P-channel and N-channel TFTs are approximately equalized while the threshold voltage of the N-channel TFT is kept large enough to prevent it from being rendered in a normally-on state.
As a result of the investigation about the relationship between the threshold voltage of the TFT and its channel length, the present inventors have discovered a tendency that the absolute value of the threshold voltage increases as the channel length becomes longer. Examples of this tendency is shown in FIGS. 1(A)-1(C). FIGS. 1(A) and 1(B) show relationships between the threshold voltage and the channel length in a P-channel (P-ch) TFT and an N-channel (N-ch) TFT, respectively. In these examples, silicon semiconductors used for the channels of the P-channel and N-channel TFTs are high quality semiconductors which exhibit intrinsic or substantially intrinsic conductivity, and in which an impurity concentration of phosphorus, boron, etc. is lower than 1xc3x971016 cmxe2x88x923 and carbon, oxygen or nitrogen has a concentration lower than 1xc3x971019 cmxe2x88x923.
Naturally, even with the same channel length, the threshold voltage varies depending on the quality and thickness of the active layer of the TFT, the thickness of the gate insulating film, and the TFT structure (for instance, existence of a lightly doped drain and/or an offset region). For example. P-channel TFTs may have different characteristics (a)-(c) as shown in FIG. 1(A). Similarly, N-channel TFTs may have different characteristics (a)-(c) as shown in FIG. 1(B). The characteristics (a)-(c) of FIG. 1(A) and those of FIG. 1(B) are of TFTs having the same structure and manufactured under the same conditions. That is, the curve (a) of FIG. 1(A) and the curve (a) of FIG. 1(B) respectively represent the threshold voltage characteristics of a P-channel TFT and an N-channel TFT having the same structure and formed on the same substrate under the equivalent conditions.
FIG. 1(C) shows characteristics obtained by superimposing the characteristics of FIGS. 1(A) and 1(B) on each other. Naturally, with the same channel length, the absolute value of the threshold voltage of the N-channel TFT. is different from that of the P-channel TFT. In this example, with a channel length of 6 xcexcm, the P-channel TFT has a threshold voltage of xe2x88x923.2 V whereas the N-channel TFT has a threshold voltage of +1.8 V.
However, the threshold voltage absolute values can be approximately equalized by properly setting the channel lengths. For example, if the channel lengths of the N-channel TFT and the P-channel TFT are set at 6 xcexcm and 4 xcexcm, respectively, the threshold voltages of those TFTs are +1.8 V and xe2x88x922.2 V, respectively.
Conversely, using FIG. 1(C), a channel length for obtaining a necessary threshold voltage can be calculated. For example, to obtain a threshold voltage absolute value of 2 V, the N-channel TFT and the P-channel TFT should have channel lengths of 6-7 xcexcm and 3-4 xcexcm, respectively.
FIGS. 2(A)-2(C) show an example of a complementary inverter according to the invention. FIG. 2(A) is a top view of the inverter circuit, in which a P-channel TFT is on the left side and an N-channel TFT is on the right side. In FIG. 2(A), reference numeral 1 denotes a gate electrode of the P-channel TFT; 2, a gate electrode of the N-channel TFT; 3, a source electrode of the P-channel TFT; 4, a drain wiring; and 5, a source electrode of the N-channel TFT. As seen from FIG. 1(A), a width a (which corresponds to the channel length) of the gate electrode 1 of the P-channel TFT is shorter than a width b of the gate electrode 2 of the N-channel TFT.
FIG. 2(B) is a sectional view of the above circuit, in which reference numerals 1-5 denote the same parts as those in FIG. 2(A). Reference numeral 6 denotes a gate insulating film; 7, a source of the P-channel TFT; 8, a drain of the P-channel TFT; 9, a drain of the N-channel TFT; 10, a source of the N-channel TFT; and 11, an interlayer insulator.
FIG. 2(C) shows another example, in which the gate electrode of each TFT does not overlap with the source and drain (i.e. offset gate structure). An offset width t is approximately equal to the thickness of a coating 12 or 13 (for instance, an anodic oxide film) formed around the gate electrode. In this type of TFT, the channel length is not necessarily equal to the width of the gate electrode. Further, the relationship between the channel length and the threshold voltage is not necessarily equal to that represented by (a) in FIGS. 1(A) and 1(B).
However, even in the circuit of FIG. 2(C), the relationship between the channel length and the threshold voltage is similar to that discussed in connection with FIGS. 1(A)-1(C). This is because the channel length is determined simply by the width of the gate electrode provided that the structure of the TFTs formed on the substrate is entirely the same and the size of the offset region is uniform. Therefore, as in the case of the FIG. 2(B) circuit, the absolute value of the threshold voltage of the N-channel and P-channel TFTs can be approximately equalized by making the channel lengths or gate electrode widths of those TFTs different from each other.
In accordance with the present invention, the gate electrode width of a P-channel TFT (in a direction along source and drain regions) should be 25 to 80% of the gate electrode width of an N-channel TFT in order to control the threshold voltages. Also, when using a crystalline non-single crystalline silicon (such as polycrystalline silicon), it is desirable that the concentration of N or P-type impurity such as phosphorous or boron in a channel region be as small as possible, for example, less than 1xc3x971018 atoms/cm3, more preferably, less than 1xc3x971016 atoms/cm3.
In the manner as described above, the absolute value of threshold voltages of the N-channel and P-channel TFTs can be approximately equalized. In general, a change in the channel length causes variations in other characteristics of a TFT, for instance, the mobility and off-current (source-drain leak current when the gate is reversely biased). Values of these characteristics can be optimized by adjusting the channel width.
Even if the channel length of a P-channel TFT is reduced, deteriorations due to the generation of hot carriers; in particular, a shift of the threshold voltage and a reduction of the mobility is small. Therefore, there occurs no problem. in the reliability. Conversely, if the channel length of an N-channel TFT is increased, hot carrier generation in the drain can be suppressed. Thus, the invention is effective in improving the reliability.